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GUIDES: Ethernet SWITCH FPGA IP
GUIDES: Ethernet SWITCH FPGA IP
Maize Microsystems has officially released version 1.0 of its Ethernet Switch FPGA IP, designed with tactical embedded systems in mind—think avionics, space, and automotive. The goal: a switch IP that’s easy to instantiate in FPGAs while delivering the performance and features these demanding environments require.
Version 1.0 focuses on Layer 2 Ethernet packet switching, with three core priorities:
Effortless integration: The IP is designed for drag-and-drop instantiation within FPGAs, minimizing setup complexity.
High performance: With tactical systems trending toward 10+ Gbps, near-line-rate throughput is essential. The switch includes features like packet queuing (including spooling to/from DDR memory), traffic shaping and policing (including rate-limiting, pause frame handling, and pause frame generation)
Intuitive configuration and monitoring: A Linux-based interface allows users to view status and packet counters using standard tools like ifconfig and ethtool. A single command-line utility manages all switch settings and tables.
Article 1: Instantiating the ethernet switch fpga ip
Article 1: Instantiating the ethernet switch fpga ip
This article kicks off a multi-part series introducing Maize Micro’s Ethernet Switch FPGA IP. We’ll start by showing how easily the switch IP integrates into an FPGA design, then move on to how effortlessly it operates on a network—often with minimal configuration. Along the way, we’ll explore the Linux-based configuration and status interface, and dive into performance testing.
Article 2: Creating a Linux Software BSP FOR THE Ethernet Switch FPGA IP
Article 2: Creating a Linux Software BSP FOR THE Ethernet Switch FPGA IP
The second article in a multi-part series introducing Maize Micro’s Ethernet Switch FPGA IP. Now that we have an Ethernet switch hardware project targeting an AMD Versal FPGA, the next step is to build a minimal yet very useful Board Support Package (BSP) for the switch. We'll use AMD's Petalinux tools to create, compile, and package the BSP.
Article 3: Using and Configuring Maize Micro's Ethernet Switch (FPGA IP)
Article 3: Using and Configuring Maize Micro's Ethernet Switch (FPGA IP)
The third article in a multi-part series introducing Maize Micro's Ethernet Switch FPGA IP. With a complete FPGA project including BSP it's time to configure and use the Ethernet switch for its intended purpose, switching packets on an Ethernet network. Maize Micro’s Ethernet Switch operates out‑of‑the‑box with no configuration, automatically forwarding Ethernet traffic as expected. In addition, the switch IP supports detailed static configuration, which is particularly valuable in environments requiring strict control, such as space operations. The switch also offers a range of packet counters and statistics features, many of which will be highlighted in this article.
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